Raspberry Pi /RP2350 /PPB /SYST_CSR

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Interpret as SYST_CSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ENABLE)ENABLE 0 (TICKINT)TICKINT 0 (CLKSOURCE)CLKSOURCE 0 (COUNTFLAG)COUNTFLAG

Description

Use the SysTick Control and Status Register to enable the SysTick features.

Fields

ENABLE

Enable SysTick counter: 0 = Counter disabled. 1 = Counter enabled.

TICKINT

Enables SysTick exception request: 0 = Counting down to zero does not assert the SysTick exception request. 1 = Counting down to zero to asserts the SysTick exception request.

CLKSOURCE

SysTick clock source. Always reads as one if SYST_CALIB reports NOREF. Selects the SysTick timer clock source: 0 = External reference clock. 1 = Processor clock.

COUNTFLAG

Returns 1 if timer counted to 0 since last time this was read. Clears on read by application or debugger.

Links

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